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  ? semiconductor components industries, llc, 2016 march, 2018 ? rev. 5 1 publication order number: ncv8177/d ncv8177 linear voltage regulator fast transient response 500 ma with enable the ncv8177 is cmos ldo regulator featuring 500 ma output current. the input voltage is as low as 1.6 v and the output voltage can be set from 0.75 v. it provides very stable and accurate voltage with low noise and high power supply rejection ratio (psrr) suitable for rf applications. the ncv8177 is suitable for powering rf blocks of automotive infotainment systems and other power sensitive device. due to low power consumption the ncv8177 offers high efficiency and low thermal dissipation. small 4?pin xdfn4 1.0 mm x 1.0 mm or wdfnw8 2 mm x 2 mm packages make the device especially suitable for space constrained applications. features ? operating input voltage range: 1.6 v to 5.5 v ? output voltage range: 0.7 v to 3.6 v ? quiescent current typ. 60  a ? low dropout: 200 mv typ. at 500 ma, v out?nom = 1.8 v ? high output voltage accuracy 0.8% ? stable with small 1  f ceramic capacitors ? over?current protection ? thermal shutdown protection: 175 c ? with (ncv8177a) and without (ncv8177b) output discharge function ? available in xdfn4 1 mm x 1 mm x 0.4 mm and wdfnw8 2 mm x 2 mm packages ? ncv prefix for automotive and other applications requiring unique site and control change requirements; aec?q100 qualified and ppap capable ? this is a pb?free device typical applications ? lights ? instrument equipment ? cameras, camcorders, sensors figure 1. typical application schematics ncv8177 in wdfnw8 in en out gnd c out 1 f c in 1 f off on v in v out in out fb ncv8177 in xdfn4 in en out gnd c out 1 f c in 1 f off on v in v out marking diagrams xdfn4 case 711aj see detailed ordering, marking and shipping information on page 11 of this data sheet. ordering information xdfn4 www. onsemi.com xx m 1 1 epad out gnd in en 43 12 pinout diagrams 1 xx = specific device code m = date code  = pb?free package xx m   1 (note: microdot may be in either location) wdfnw8 case 511cl (xdfn4) (wdfnw8) wdfnw8 in 8 in 7 nc 6 en 5 out out fb gnd 1234 epad
ncv8177 www. onsemi.com 2 figure 2. internal block diagram pin function description pin no. pin name description xdfn4 wdfnw8 1 1 out regulated output voltage pin ? 2 out regulated output voltage pin (must be connected to pin 1) 4 8 in power supply input voltage pin ? 7 in power supply input voltage pin (must be connected to pin 8) 2 4 gnd power supply ground pin 3 5 en enable pin (active ?h?) ? 3 fb feedback input pin (must be connected to output voltage pin) ? 6 nc not internally connected. this pin can be tied to the ground plane to improve thermal dissipation. ? ? epad exposed pad should be tied to ground plane for better power dissipation
ncv8177 www. onsemi.com 3 absolute maximum ratings rating symbol value unit input voltage (note 1) in ?0.3 to 6.0 v output voltage out ?0.3 to v in + 0.3 v chip enable input en ?0.3 to 6.0 v feedback input fb ?0.3 to 6.0 v output current i out internally limited ma operating ambient temperature range t a ?40 to +125 c maximum junction temperature t j(max) 150 c storage temperature t stg ?55 to 150 c esd capability, human body model (note 2) esd hbm 2000 v esd capability, machine model (note 2) esd mm 200 v stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. refer to electrical characteristics and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per jesd22?a114 esd machine model tested per jesd22?a115 latchup current maximum rating tested per jedec standard: jesd78 thermal characteristics rating symbol value unit thermal characteristics, xdfn4 (note 3) thermal resistance, junction?to?air r  ja 223 c/w thermal characteristics, wdfnw8 (note 3) thermal resistance, junction?to?ambient r  ja 72 c/w 3. measured according to jedec board specification. detailed description of the board can be found in jesd51?7 recommended operating conditions rating symbol min max unit input voltage v in 1.6 5.5 v junction temperature t j ?40 125 c functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresse s beyond the recommended operating ranges limits may affect device reliability.
ncv8177 www. onsemi.com 4 electrical characteristics v in = v out?nom + 0.5 v or v in = 1.6 v (whichever is higher), v en = 1.2 v, i out = 1 ma, c in = c out = 1.0  f, t j = 25 c the specifications in bold are guaranteed at ?40 c t j 125 c. parameter test conditions symbol min typ max unit input voltage v in 1.6 5.5 v output voltage v out_nom 1.8 v t j = +25 c v out ?0.8 0.8 % ?40 c t j 125 c ?2.0 1.0 v out_nom < 1.8 v t j = +25 c ?1.2 1.2 ?40 c t j 125 c ?2.5 1.5 line regulation v in = v out?nom + 0.5 v to 5.25 v v in 1.6 v linereg 0.02 0.15 %/v load regulation 1 ma i out 500 ma loadreg 1 10 mv dropout voltage (note 4) i out = 500 ma 1.4 v v out < 1.8 v v do 295 410 mv 1.8 v v out < 2.1 v 200 305 2.1 v v out < 2.5 v 160 260 2.5 v v out < 3.0 v 130 220 3.0 v v out < 3.6 v 110 190 quiescent current i out = 0 ma i q 60 90  a standby current v en = 0 v i stby 0.1 1.5  a output current limit v out = v out?nom ? 100 mv v in = v out?nom + 0.5 v or v in = 1.7 v (whichever is higher) i out 510 800 ma short circuit current v out = 0 v i sc 510 800 ma en pin threshold voltage en input voltage ?h? v enh 1.0 v en input voltage ?l? v enl 0.4 enable input current v en = v in = 5.5 v i en 0.15 0.6  a power supply rejection ratio f = 1 khz, ripple 0.2 vp?p, v in = v out?nom + 1.0 v, i out = 30 ma (v out 2.0 v, v in = 3.0 v) psrr 75 db output noise f = 10 hz to 100 khz 54  v rms output discharge resistance (ncv8177a option only) v in = 4.0 v, v en = 0 v, v out = v out?nom r actdis 60  thermal shutdown temperature temperature rising from 25 c t sd_temp 175 c thermal shutdown hysteresis temperature falling from t sd_temp t sd_hyst 20 c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. measured when the output voltage falls 3% below the nominal output voltage (the voltage measured under the condition v in = v out?nom + 0.5 v).
ncv8177 www. onsemi.com 5 typical characteristics v in = v out?nom + 0.5 v or v in = 1.6 v (whichever is higher), v en = 1.2 v, i out = 1 ma, c in = c out = 1.0  f, t j = 25 c figure 3. output voltage vs. temperature figure 4. output voltage vs. temperature temperature ( c) temperature ( c) 80 60 40 20 0 ?20 ?40 0.680 0.685 0.690 0.695 0.700 0.705 80 60 40 20 0 ?20 ?40 1.76 1.77 1.78 1.79 1.80 1.81 figure 5. output voltage vs. temperature figure 6. line regulation vs. temperature temperature ( c) temperature ( c) 80 60 40 20 0 ?20 ?40 3.24 3.25 3.27 3.33 3.29 3.30 3.32 80 60 40 20 0 ?20 ?40 ?0.10 ?0.08 ?0.04 ?0.02 0 0.02 0.06 0.10 figure 7. load regulation vs. temperature figure 8. dropout voltage vs. output current temperature ( c) output current (ma) 80 60 40 20 0 ?20 ?40 ?5 ?4 ?2 ?1 0 2 3 5 500 400 300 200 100 0 0 100 150 200 output voltage (v) output voltage (v) output voltage (v) line regulation (%/v) load regulation (mv) dropout voltage (mv) 3.26 3.28 3.31 v out?nom = 0.7 v v out?nom = 1.8 v v out?nom = 3.3 v ?0.06 0.04 0.08 v out?nom = 3.3 v v in = 3.8 v to 5.25 v v out?nom = 3.3 v i out = 1 ma to 500 ma ?3 1 4 50 250 v out?nom = 1.8 v t j = 125 c t j = 25 c t j = ?40 c 100 120 0.710 1.82 100 120 100 120 100 120 100 120
ncv8177 www. onsemi.com 6 typical characteristics v in = v out?nom + 0.5 v or v in = 1.6 v (whichever is higher), v en = 1.2 v, i out = 1 ma, c in = c out = 1.0  f, t j = 25 c figure 9. dropout voltage vs. temperature figure 10. dropout voltage vs. output current temperature ( c) output current (ma) 80 60 40 20 0 ?20 ?40 0 100 150 200 500 400 300 200 100 0 0 20 40 60 100 120 140 160 figure 11. dropout voltage vs. temperature figure 12. standby current vs. temperature temperature ( c) temperature ( c) 80 60 40 20 0 ?20 ?40 0 20 40 60 80 100 140 160 80 60 40 20 0 ?20 ?40 0 0.1 0.3 0.4 0.6 figure 13. quiescent current vs. temperature figure 14. quiescent current vs. input voltage temperature ( c) input voltage (v) 80 60 40 20 0 ?20 ?40 0 10 20 40 50 60 80 90 5.0 4.5 5.5 4.0 3.5 3.0 2.5 2.0 50 55 60 65 75 80 85 dropout voltage (mv) dropout voltage (mv) dropout voltage (mv) standby current (  a) quiescent current (  a) quiescent current (  a) v out?nom = 1.8 v 50 250 i out = 10 ma i out = 100 ma i out = 250 ma i out = 500 ma v out?nom = 3.3 v t j = 125 c t j = 25 c t j = ?40 c 80 v out?nom = 3.3 v i out = 10 ma i out = 100 ma i out = 250 ma i out = 500 ma 120 0.2 0.5 v en = 0 v v out?nom = 0.7 v to 3.3 v v out?nom = 0.7 v i out = 0 ma v out?nom = 3.3 v v out?nom = 1.8 v 30 70 i out = 0 ma t j = 125 c t j = 25 c t j = ?40 c v out?nom = 1.8 v 70 120 100 100 120 100 120 100 120
ncv8177 www. onsemi.com 7 typical characteristics v in = v out?nom + 0.5 v or v in = 1.6 v (whichever is higher), v en = 1.2 v, i out = 1 ma, c in = c out = 1.0  f, t j = 25 c figure 15. ground current vs. output current figure 16. short circuit current vs. temperature output current (ma) temperature ( c) 500 400 300 200 100 0 0 50 100 150 200 250 300 80 60 40 20 0 ?20 ?40 500 550 650 700 750 800 900 1000 figure 17. output current limit vs. temperature figure 18. enable threshold voltage vs. temperature temperature ( c) temperature ( c) 80 60 40 20 0 ?20 ?40 500 550 650 700 800 900 950 1000 80 60 40 20 0 ?20 ?40 0.4 0.5 0.6 0.7 0.9 0.8 1.0 figure 19. enable input current vs. temperature figure 20. output discharge resistance vs. temperature (ncv8177a option only) temperature ( c) temperature ( c) 80 60 40 20 0 ?20 ?40 0 0.1 0.2 0.3 0.4 0.5 0.6 80 60 40 20 0 ?20 ?40 0 10 20 30 40 50 60 70 ground current (  a) short circuit current (ma) output current limit (ma) enable threshold voltage (v) enable input current (  a) output discharge resistance (  ) v out?nom = 1.8 v t j = 125 c t j = 25 c t j = ?40 c v out?forced = 0 v 600 850 950 v out?nom = 0.7 v 1.4 v 3.3 v 1.8 v v out?forced = v out?nom ? 0.1 v v out?nom = 0.7 v 1.4 v 3.3 v 1.8 v 600 750 850 v out?nom = 1.8 v off ?> on on ?> off v out?nom = 1.8 v v in = 5.5 v v en = 5.5 v v out?nom = 1.8 v v in = 4 v v en = 0 v v out?forced = v out?nom 100 120 100 120 100 120 100 120 80 100 120
ncv8177 www. onsemi.com 8 typical characteristics v in = v out?nom + 0.5 v or v in = 1.6 v (whichever is higher), v en = 1.2 v, i out = 1 ma, c in = c out = 1.0  f, t j = 25 c figure 21. power supply rejection ratio figure 22. output voltage noise spectral density frequency (hz) frequency (hz) 10m 1m 100k 10k 1k 100 10 0 10 30 40 50 60 80 90 1m 100k 10k 1k 100 10 0 1 2 3 4 5 6 figure 23. turn?on/off ? vin driven (slow) figure 24. turn?on ? vin driven (fast) figure 25. turn?on/off ? en driven figure 26. line transient response psrr (db) output voltage noise (  v/ hz ) 1 ms/div 1 v/div v out?nom = 1.8 v 50 ma/div v in i in v out 50  s/div v out?nom = 1.8 v 50 ma/div i in v in v out 1 ms/div 2 v/div v out?nom = 1.8 v 500 mv/div v in i in v out without output discharge with output discharge 5  s/div v out?nom = 1.8 v 3.3 v 500 mv/div v in v out t r = t f = 1  s v en 5 mv/div 2.3 v 1.8 v 20 70 c out = 1  f x7r 0805 v out_nom = 1.8 v, v in = 3.0 v v out_nom = 3.3 v, v in = 4.3 v v out_nom = 1.8 v, v in = 3.0 v v out_nom = 3.3 v, v in = 4.3 v c out = 1  f x7r 0805 integral noise: 10 hz ? 100 khz: 54  vrms 10 hz ? 1 mhz: 62  vrms 500 mv/div 1 v/div
ncv8177 www. onsemi.com 9 typical characteristics v in = v out?nom + 0.5 v or v in = 1.6 v (whichever is higher), v en = 1.2 v, i out = 1 ma, c in = c out = 1.0  f, t j = 25 c figure 27. load transient response figure 28.  ja and p d(max) vs. copper area 20  s/div pcb copper area (mm 2 ) 600 500 400 300 200 100 0 190 210 250 270 290 330 350 370 1 v/div  ja , junction to ambient thermal resistance ( c/w) v out?nom = 1.8 v 1 ma 1.8 v 500 ma 200 ma/div 50 mv/div v in i out v out 310 230 0 0.1 0.3 0.4 0.5 0.7 0.6 0.2  ja , 1 oz cu  ja , 2 oz cu p d(max) , 1 oz cu p d(max) , 2 oz cu p d(max) , maximum power dissipation (w) t r = t f = 1  s applications information general the ncv8177 is a high performance 500 ma low dropout linear regulator (ldo) delivering excellent noise and dynamic performance. thanks to its adaptive ground current behavior the device consumes only 60  a of quiescent current (no?load condition). the regulator features low noise of 48  v rms , psrr of 75 db at 1 khz and very good line/load transient performance. such excellent dynamic parameters, small dropout voltage and small package size make the device an ideal choice for powering the precision noise sensitive circuitry in portable applications. a logic en input provides on/off control of the output voltage. when the en is low the device consumes as low as 100 na typ. from the in pin. the device is fully protected in case of output overload, output short circuit condition or overheating, assuring a very robust design. input capacitor selection (c in ) input capacitor connected as close as possible is necessary to ensure device stability. the x7r or x5r capacitor should be used for reliable performance over temperature range. the value of the input capacitor should be 1  f or greater for the best dynamic performance. this capacitor will provide a low impedance path for unwanted ac signals or noise modulated onto the input voltage. there is no requirement for the esr of the input capacitor but it is recommended to use ceramic capacitor for its low esr and esl. a good input capacitor will limit the influence of input trace inductance and source resistance during load current changes. output capacitor selection (c out ) the ldo requires an output capacitor connected as close as possible to the output and ground pins. the recommended capacitor value is 1  f, ceramic x7r or x5r type due to its low capacitance variations over the specified temperature range. the ldo is designed to remain stable with minimum effective capacitance of 0.8  f. when selecting the capacitor the changes with temperature, dc bias and package size needs to be taken into account. especially for small package size capacitors such as 0201 the effective capacitance drops rapidly with the applied dc bias voltage (refer the capacitor?s datasheet for details). there is no requirement for the minimum value of equivalent series resistance (esr) for the c out but the maximum value of esr should be less than 0.5  . larger capacitance and lower esr improves the load transient response and high frequency psrr. only ceramic capacitors are recommended, the other types like tantalum capacitors not due to their large esr. enable operation the ldo uses the en pin to enable/disable its operation and to deactivate/activate the output discharge function (a?version only). if the en pin voltage is < 0.4 v the device is disabled and the pass transistor is turned off so there is no current flow between the in and out pins. on a?version the active discharge transistor is active so the output voltage is pulled to gnd through 60  (typ.) resistor. if the en pin voltage is > 1.0 v the device is enabled and regulates the output voltage. the active discharge transistor is turned off.
ncv8177 www. onsemi.com 10 the en pin has internal pull?down current source with value of 300 na typ. which assures the device is turned off when the en pin is unconnected. in case when the en function isn? t required the en pin should be tied directly to in pin. output current limit output current is internally limited to a 750 ma typ. the ldo will source this current when the output voltage drops down from the nominal output voltage (test condition is v out?nom ? 100 mv). if the output voltage is shorted to ground, the short circuit protection will limit the output current to 700 ma typ. the current limit and short circuit protection will work properly over the whole temperature and input voltage ranges. there is no limitation for the short circuit duration. thermal shutdown when the ldo?s die temperature exceeds the thermal shutdown threshold value the device is internally disabled. the ic will remain in this state until the die temperature decreases by value called thermal shutdown hysteresis. once the ic temperature falls this way the ldo is back enabled. the thermal shutdown feature provides the protection against overheating due to some application failure and it is not intended to be used as a normal working function. power dissipation power dissipation caused by voltage drop across the ldo and by the output current flowing through the device needs to be dissipated out from the chip. the maximum power dissipation is dependent on the pcb layout, number of used cu layers, cu layers thickness and the ambient temperature. the maximum power dissipation can be computed by following equation: p d(max)  t j  t a  ja  125  t a  ja [w] (eq. 1) where: (t j ? t a ) is the temperature dif ference between the junction and ambient temperatures and ja is the thermal resistance (dependent on the pcb as mentioned above). for reliable operation junction temperature should be limited to +125 c. the power dissipated by the ldo for given application conditions can be calculated by the next equation: p d  v in  i gnd   v in  v out   i out [w] (eq. 2) where: i gnd is the ldo?s ground current, dependent on the output load current. connecting the exposed pad and n/c pin to a large ground planes helps to dissipate the heat from the chip. the relation of ja and p d(max) to pcb copper area and cu layer thickness could be seen on the figure 26. reverse current the pmos pass transistor has an inherent body diode which will be forward biased in the case when v out > v in . due to this fact in cases, where the extended reverse current condition can be anticipated the device may require additional external protection. power supply rejection ratio the ldo features very high power supply rejection ratio. the psrr at higher frequencies (in the range above 100 khz) can be tuned by the selection of c out capacitor and proper pcb layout. a simple lc filter could be added to the ldo?s in pin for further psrr improvement. enable turn?on time the enable turn?on time is defined as the time from en assertion to the point in which v out will reach 98% of its nominal value. this time is dependent on various application conditions such as v out?nom , c out and t a . pcb layout recommendations to obtain good transient performance and good regulation characteristics place c in and c out capacitors as close as possible to the device pins and make the pcb traces wide. in order to minimize the solution size, use 0402 or 0201 capacitors size with appropriate effective capacitance. larger copper area connected to the pins will also improve the device thermal resistance. the actual power dissipation can be calculated from the equation above (power dissipation section). exposed pad and n/c pin should be tied to the ground plane for good power dissipation.
ncv8177 www. onsemi.com 11 ordering information part number voltage option option marking package shipping ? ncv8177amx075tcg 0.75 v with output discharge va xdfn4 (pb?free) 3000 / tape & reel ncv8177amx090tcg 0.90 v vh ncv8177amx120tcg 1.20 v vc ncv8177amx150tcg 1.50 v vd ncv8177amx180tcg 1.80 v ve ncv8177amx250tcg 2.50 v vf ncv8177amx330tcg 3.30 v vg ncv8177bmx075tcg 0.75 v without output discharge v2 ncv8177bmx090tcg 0.90 v vz ncv8177bmx120tcg 1.20 v v3 ncv8177bmx150tcg 1.50 v v4 ncv8177bmx180tcg 1.80 v v5 ncv8177bmx250tcg 2.50 v v6 ncv8177bmx330tcg 3.30 v v7 ncv8177amtw090tcg 0.90 v with output discharge th wdfnw8 wettable flank (pb?free) 3000 / tape & reel ncv8177amtw110tcg 1.10 v tc NCV8177AMTW120TCG 1.20 v tk ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncv8177 www. onsemi.com 12 package dimensions wdfnw8 2x2, 0.5p case 511cl issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. 5. this device contains wettable flank design features to aid in fillet for- mation on the leads during mounting. ?? ?? a d e b pin one reference top view side view bottom view l d2 e2 c c 0.10 c 0.08 seating plane 8x note 3 b 8x dim min nom millimeters a 0.70 0.75 a1 0.00 0.03 b 0.20 0.25 d d2 1.50 1.60 e e2 0.80 0.90 e 0.50 bsc l 0.20 0.30 1 4 8 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.50 pitch 1.00 2.60 1 dimensions: millimeters 0.65 8x note 4 0.30 8x detail a a3 0.20 ref a3 a detail b 1.90 2.00 outline package e recommended k 5 1.70 k e/2 a 0.10 b c 0.05 c a4 l3 max 1.90 2.00 0.80 0.05 0.30 1.70 1.00 0.40 2.10 2.10 alternate construction detail a l3 section c?c plated a4 surfaces l3 l3 l detail b plating exposed alternate construction copper a4 a1 a4 a1 l 0.05 0.10 0.15 0.25 ??? ??? 0.00 0.05 0.10 c c
ncv8177 www. onsemi.com 13 package dimensions xdfn4 1.0x1.0, 0.65p case 711aj issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.20 mm from the terminal tips. 4. coplanarity applies to the exposed pad as well as the terminals. a b e d d2 bottom view b e 4x note 3 2x 0.05 c pin one reference top view 2x 0.05 c a a1 (a3) 0.05 c 0.05 c c seating plane side view l 4x 1 2 dim min max millimeters a 0.33 0.43 a1 0.00 0.05 a3 0.10 ref b 0.15 0.25 d 1.00 bsc d2 0.43 0.53 e 1.00 bsc e 0.65 bsc l 0.20 0.30 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. mounting footprint* 1.20 0.26 0.24 4x dimensions: millimeters 0.39 recommended package outline note 4 e/2 d2 45  a m 0.05 b c 4 3 0.65 pitch detail a 4x b2 0.02 0.12 l2 0.07 0.17 4x 0.52 2x 0.11 4x l2 4x detail a b2 4x on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 ncv8177/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative ?


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